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LTC1255 Dual 24V High-Side MOSFET Driver
FEATURES
s s s s s s s s s
DESCRIPTIO
Fully Enhances N-Channel Power MOSFETs 12A Standby Current Operates at Supply Voltages from 9V to 24V Short Circuit Protection Easily Protected Against Supply Transients Controlled Switching ON and OFF Times No External Charge Pump Components Compatible With Standard Logic Families Available in 8-Pin SOIC
The LTC1255 dual high-side driver allows using low cost N-channel FETs for high-side industrial and automotive switching applications. An internal charge pump boosts the gate drive voltage above the positive rail, fully enhancing an N-channel MOS switch with no external components. Low power operation, with 12A standby current, allows use in virtually all systems with maximum efficiency. Included on-chip is independent overcurrent sensing to provide automatic shutdown in case of short circuits. A time delay can be added to the current sense to prevent false triggering on high in-rush current loads. The LTC1255 operates from 9V to 24V supplies and is well suited for industrial and automotive applications. The LTC1255 is available in both an 8-pin DIP and an 8-pin SOIC.
APPLICATI
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Solenoid Drivers DC Motor Drivers Stepper Motor Drivers Lamp Drivers/Dimmers Relay Drivers Low Frequency H-Bridge P-Channel Switch Replacement
TYPICAL APPLICATI
Dual 24V High-Side Switch with Overcurrent Protection
24V
+
0.036 10F VS DS1 IRLR024 12V DS2 IRLR024 12V G1 LTC1255 G2 IN1 GND IN2 0.036
SUPPLY CURRENT (A)
24V/0.5A SOLENOID
FROM 1N4001 P, ETC.
FROM P, ETC.
1N4001
24V/0.5A SOLENOID
LTC1255 * TA01
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Standby Supply Current
50 45 40 35 30 25 20 15 10 5 0 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 VIN1 = VIN2 = 0V TA = 25C
LTC1255 * TA02
UO
UO
1
LTC1255 ABSOLUTE AXI U RATI GS
Operating Temperature Range LTC1255C............................................... 0C to 70C LTC1255I ........................................... - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C Supply Voltage ......................................... - 0.3V to 30V Transient Supply Voltage (< 10ms) ......................... 40V Input Voltage ..................... (VS + 0.3V) to (GND - 0.3V) Gate Voltage ...................... (VS + 20V) to (GND - 0.3V) Current (Any Pin)................................................. 50mA
PACKAGE/ORDER I FOR ATIO
TOP VIEW DS1 1 GATE 1 2 GND 3 IN1 4 8 7 6 5 DS2 GATE 2 VS IN2
ORDER PART NUMBER
DS1 1
LTC1255CN8 LTC1255IN8
N8 PACKAGE 8-LEAD PLASTIC DIP
TJMAX = 100C, JA = 130C/ W
ELECTRICAL CHARACTERISTICS
SYMBOL IQ PARAMETER Quiescent Current OFF
VS = 9V to 24V, TA = 25C, unless otherwise noted.
MIN TYP 12 12 12 160 350 600
q q
CONDITIONS VS = 10V, VIN = 0V (Note 1) VS = 18V, VIN = 0V (Note 1) VS = 24V, VIN = 0V (Note 1) VS = 10V, VGATE = 22V, VIN = 5V (Note 2) VS = 18V, VGATE = 30V, VIN = 5V (Note 2) VS = 24V, VGATE = 36V, VIN = 5V (Note 2)
Quiescent Current ON
VINH VINL IIN CIN VSEN ISEN VGATE - VS IGATE
Input High Voltage Input Low Voltage Input Current Input Capacitance Drain Sense Threshold Voltage Drain Sense Input Current Gate Voltage Above Supply Gate Output Drive Current
0V VIN VS
0V VSEN VS VS = 9V VS = 18V, VGATE = 30V VS = 24V, VGATE = 36V
2
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WW
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TOP VIEW 8 7 6 5 DS2 GATE 2 VS IN2
ORDER PART NUMBER LTC1255CS8 LTC1255IS8 S8 PART MARKING 1255 1255I
GATE 1 2 GND 3 IN1 4
S8 PACKAGE 8-LEAD PLASTIC SOIC
TJMAX = 100C, JA = 150C/ W
MAX 40 40 40 400 800 1200 0.8 1
UNITS A A A A A A V V A pF mV mV A V A A
2
q
q q q q q
80 75 7.5 5 5
5 100 100 10.5 20 23
120 125 0.1 12
LTC1255
ELECTRICAL CHARACTERISTICS
SYMBOL tON PARAMETER Turn-ON Time
VS = 9V to 24V, TA = 25C, unless otherwise noted.
MIN 30 75 40 75 50 10 10 10 5 5 5 TYP 100 250 120 250 180 24 21 19 16 16 16 MAX 300 750 400 750 500 60 60 60 30 30 30 UNITS s s s s s s s s s s s
CONDITIONS VS = 10V, CGATE = 1000pF (Note 3) Time for VGATE > VS + 2V Time for VGATE > VS + 5V VS = 18V, CGATE = 1000pF (Note 3) Time for VGATE > VS + 5V Time for VGATE > VS + 10V VS = 24V, CGATE = 1000pF (Note 3) Time for VGATE > VS + 10V VS = 10V, CGATE = 1000pF, (Note 3, 4) VS = 18V, CGATE = 1000pF, (Note 3, 4) VS = 24V, CGATE = 1000pF, (Note 3, 4) VS = 10V, CGATE = 1000pF, (Note 3, 4) VS = 18V, CGATE = 1000pF, (Note 3, 4) VS = 24V, CGATE = 1000pF, (Note 3, 4)
tOFF
Turn-OFF Time
tSC
Short-Circuit Turn-OFF Time
The q denotes specifications which apply over the full operating temperature range. Note 1: Quiescent current OFF is for both channels in OFF condition. Note 2: Quiescent current ON is per driver and is measured independently. The gate voltage is clamped to 12V above the rail to simulate the effects of protection clamps connected across the GATE-SOURCE of the power MOSFET.
Note 3: Zener diode clamps must be connected across the GATE-SOURCE of the power MOSFET to limit VGS. 1N5242A (through hole) or MMBZ5242A (surface mount) 12V Zener diodes are recommended. All Turn-ON and Turn-OFF tests are performed with a 12V Zener clamp in series with a small-signal diode connected between VS and the GATE output to simulate the effects of a 12V protection Zener clamp connected across the GATE-SOURCE of the power MOSFET. Note 4: Time for VGATE to drop below 1V.
TYPICAL PERFOR A CE CHARACTERISTICS
Standby Supply Current
50 45 40 VIN1 = VIN2 = 0V TA = 25C
SUPPLY CURRENT (mA)
SUPPLY CURRENT (A)
35 30 25 20 15 10 5 0 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30
1.2 1.0 0.8 0.6 0.4 0.2 0 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30
VGATE - VS (V)
UW
LTC1255 * TPC01
Supply Current per Driver (ON)
2.0 1.8 1.6 1.4 ONE INPUT = 0N OTHER INPUT = OFF TA = 25C
20 18 16 14 12 10 8 6 4 2 0
Gate Voltage Above Supply
VCLAMP = 12V
0
5
15 20 10 SUPPLY VOLTAGE (V)
25
30
LTC1255 * TPC02
LTC1255 * TPC03
3
LTC1255
TYPICAL PERFOR A CE CHARACTERISTICS
Input Threshold Voltage
2.4
125
DRAIN SENSE THRESHOLD VOLTAGE (V)
2.2
INPUT THRESHOLD VOLTAGE (V)
1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 VON VOFF
110 105 100 95 90 85 80 75 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30
GATE CLAMP CURRENT (A)
2.0
Turn-ON Time
1000 900 800
TURN-OFF TIME (s)
CGATE = 1000pF TA = 25C
TURN-OFF TIME (s)
TURN-ON TIME (s)
700 600 500 400 300 200 100 0 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 VGS = 2V VGS = 5V
Standby Supply Current
50
STANDBY SUPPLY CURRENT (A)
45 40 35 30 25 20 15 10 5 0 -50 -25 VS = 18V VS = 24V VS = 10V
SUPPLY CURRENT (mA)
1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 75 100 0 -50 VS = 18V VS = 10V -25 25 50 0 TEMPERATURE (C) 75 100 VS = 24V
INPUT THRESHOLD VOLTAGE (V)
25 50 0 TEMPERATURE (C)
4
UW
LTC1255 * TPC04
Drain Sense Threshold Voltage
50
TA = 25C 120 115
Gate Clamp Current
45 40 35 30 25 20 15 10 5 0 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 VCLAMP = 12V TA = 25C
LTC1255 * TPC05
LTC1255 * TA06
Turn-OFF Time
50 45 40 35 30 25 20 15 10 5 0 0 5 15 20 10 SUPPLY VOLTAGE (V) 25 30 CGATE = 1000pF TIME FOR VGATE < 1V
50 45 40 35 30 25 20 15 10 5 0
Short-Circuit Turn-OFF Delay Time
CGATE = 1000pF TIME FOR VGATE < 1V
0
5
15 20 10 SUPPLY VOLTAGE (V)
25
30
LTC1255 * TA07
LTC1255 * TA08
LTC1255 * TA09
Supply Current per Channel (ON)
2.0 1.8 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6
Input ON Threshold
VS = 10V VS = 24V
0.4 -50
-25
25 50 0 TEMPERATURE (C)
75
100
LTC1255 * TA10
LTC1255 * TA11
LTC1255 * TA12
LTC1255
PI FU CTIO S
Input Pin The LTC1255 input pin is active high and activates all of the protection and charge pump circuitry when switched ON. The LTC1255 logic and shutdown inputs are high impedance CMOS gates with ESD protection diodes to ground and supply and therefore should not be forced beyond the power supply rails. The input pin should be held low during the application of power to properly set the input latch. Gate Drive Pin The gate drive pin is either driven to ground when the switch is turned OFF or driven above the supply rail when the switch is turned ON. This pin is of relatively high impedance when driven above the rail (the equivalent of a few hundred k). Care should be taken to minimize any loading of this pin by parasitic resistance to ground or supply. Supply Pin The supply pin of the LTC1255 serves two vital purposes. The first is obvious; it powers the input, gate drive, regulation and protection circuitry. The second purpose is less obvious; it provides a Kelvin connection to the top of the drain sense resistor for the internal 100mV reference. The LTC1255 is designed to be continuously powered so that the gate of the MOSFET is actively driven at all times. If it is necessary to remove power from the supply pin and then reapply it, the input pin should be cycled (low to high) a few milliseconds after the power is reapplied to reset the input latch and protection circuitry. Also, the input pin should be isolated from the controlling logic by a 10k resistor if there is a possibility that the input pin will be held high after the supply has been removed. Drain Sense Pin The drain sense pin is compared against the supply pin voltage. If the voltage at this pin is more than 100mV below the supply pin, the input latch will be reset and the MOSFET gate will be quickly discharged. Cycle the input to reset the short-circuit latch and turn the MOSFET back on. This pin is also a high impedance CMOS gate with ESD protection and therefore should not be forced outside of the power supply rails. To defeat the overcurrent protection, short the drain sense pin to the supply pin. Some loads, such as large supply capacitors, lamps or motors require high in-rush currents. An RC time delay can be added between the sense resistor and the drain sense pin to ensure that the drain sense circuitry does not false trigger during startup. This time constant can be set from a few microseconds to many seconds. However, very long delays may put the MOSFET at risk of being destroyed by a short-circuit condition (see Applications Information section).
The supply pin of the LTC1255 should never be forced below ground as this may result in permanent damage to the device. A 100 resistor should be inserted in series with the ground pin if negative supply voltage transients are anticipated.
OPERATIO
The LTC1255 is a dual 24V MOSFET driver with built-in protection and gate charge pump. The LTC1255 consists of the following functional blocks: TTL and CMOS Compatible Inputs and Latches The LTC1255 inputs have been designed to accommodate a wide range of logic families. Both input thresh-
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olds are set at about 1.3V with approximately 100mV of hysteresis. A low standby current regulator provides continuous bias for the TTL-to-CMOS converter. The input/protection latch should be set after initial power-up, or after reapplication of power, by cycling the input low to high.
5
LTC1255
OPERATIO
Internal Voltage Regulation The output of the TTL-to-CMOS converter drives two regulated supplies which power the low voltage CMOS logic and analog blocks. The regulator outputs are isolated from each other so that the noise generated by the charge pump logic is not coupled into the 100mV reference or the analog comparator. Gate Charge Pump Gate drive for the power MOSFET is produced by an adaptive charge pump circuit which generates a gate voltage substantially higher than the power supply voltage. The charge pump capacitors are included on-chip and therefore no external components are required to generate the gate drive. The charge pump is designed to drive a 12V Zener diode clamp connected across the gate and source of the MOSFET switch.
BLOCK DIAGRA
ANALOG SECTION
VS LOW STANDBY CURRENT REGULATOR COMP 100mV REFERENCE 10s DELAY
ANALOG TTL-TO-CMOS CONVERTER
INPUT
GND
6
W
U
Drain Current Sense The LTC1255 is configured to sense the current flowing into the drain of the power MOSFET in a high-side application. An internal 100mV reference is compared to the drop across a sense resistor (typically 0.002 to 0.10) in series with the drain lead. If the drop across this resistor exceeds the internal 100mV threshold, the input latch is reset and the gate is quickly discharged via a relatively large N-channel transistor. Controlled Gate Rise and Fall Times When the input is switched ON and OFF, the gate is charged by the internal charge pump and discharged in a controlled manner. The charge and discharge rates have been set to minimize RFI and EMI emissions in normal operation. If a short circuit or current overload condition is encountered, the gate is discharged very quickly (typically a few microseconds) by a large N-channel transistor.
(One Channel)
DRAIN SENSE GATE CHARGE AND DISCHARGE CONTROL LOGIC DIGITAL R ONE SHOT S INPUT LATCH OSCILLATOR AND CHARGE PUMP FAST/SLOW GATE CHARGE LOGIC
LTC1255 * BD
GATE
VOLTAGE REGULATOR
LTC1255
APPLICATIO S I FOR ATIO
MOSFET AND LOAD PROTECTION
The LTC1255 protects the power MOSFET switch by removing drive from the gate as soon as an overcurrent condition is detected. Resistive and inductive loads can be protected with no external time delay in series with the drain sense pin. Lamp loads, however, require that the overcurrent protection be delayed long enough to start the lamp but short enough to ensure the safety of the MOSFET. Resistive Loads Loads that are primarily resistive should be protected with as short a delay as possible to minimize the amount of time that the MOSFET is subjected to an overload condition. The drain sense circuitry has a built-in delay of approximately 10s to eliminate false triggering by power supply or load transient conditions. This delay is sufficient to "mask" short load current transients and the starting of a small capacitor (< 1F) in parallel with the load. The drain sense pin can therefore be connected directly to the drain current sense resistor as shown in Figure 1.
18V VS DS1 1/2 LTC1255 IN1 GND G1 12V IRFZ24
+
10F
RSENSE 0.036
CLOAD 1F
RLOAD 18
LTC1255 * F01
Figure 1. Protecting Resistive Loads
Inductive Loads Loads that are primarily inductive, such as relays, solenoids and stepper motor windings, should be protected with as short a delay as possible to minimize the amount of time that the MOSFET is subjected to an overload condition. The built-in 10s delay will ensure that the overcurrent protection is not false triggered by a supply or load transient. No external delay components are required as shown in Figure 2.
IN1
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Large inductive loads (> 0.1mH) may require diodes connected directly across the inductor to safely divert the stored energy to ground. Many inductive loads have these diodes included. If not, a diode of the proper current rating should be connected across the load, as shown in Figure 2, to safely divert the stored energy.
12V VS DS1 1/2 LTC1255 IN1 GND G1 12V IRFZ24
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UU
+
100F
RSENSE 0.036
1N5400
12V, 1A SOLENOID
LTC1255 * F02
Figure 2. Protecting Inductive Loads
Capacitive Loads Large capacitive loads, such as complex electrical systems with large bypass capacitors, should be powered using the circuit shown in Figure 3. The gate drive to the power MOSFET is passed through an RC delay network, R1 and C1, which greatly reduces the turn-on ramp rate of the switch. And since the MOSFET source voltage follows the gate voltage, the load is powered smoothly and slowly from ground. This dramatically reduces the startup current flowing into the supply capacitor(s) which, in turn, reduces supply transients and allows for slower activation
15V VS DS1 1/2 LTC1255 G1 GND R1 100k R2 100k C1 0.33F
LTC1255 * F03
CDELAY 0.01F RDELAY 100k D1 1N4148
+
470F
RSENSE 0.036
MTP3055E 12V
+
CLOAD 100F
Figure 3. Powering Large Capacitive Loads
7
LTC1255
APPLICATIO S I FOR ATIO
of sensitive electrical loads. (Resistor R2, and the diode D1, provide a direct path for the LTC1255 protection circuitry to quickly discharge the gate in the event of an overcurrent condition.) The RC network, RDELAY and CDELAY, in series with the drain sense input should be set to trip based on the expected characteristics of the load after startup, i.e., with this circuit, it is possible to power a large capacitive load and still react quickly to an overcurrent condition. The ramp rate at the output of the switch as it lifts off ground is approximately: dV/dt = (VGATE - VTH)/(R1 x C1) Therefore, the current flowing into the capacitor during startup is approximately: ISTARTUP = CLOAD x dV/dt Using the values shown in Figure 3, the startup current is less than 100mA and does not false trigger the drain sense circuitry which is set at 2.7A with a 1ms delay. Lamp Loads The in-rush current created by a lamp during turn-on can be 10 to 20 times greater than the rated operating current. The circuit shown in Figure 4 shifts the current limit threshold up by a factor of 11:1 (to 30A) for a short period of time while the bulb is turned on. The current limit then drops down to 2.7A after the in-rush current has subsided.
12V 10k 100k VS DS1 1/2 LTC1255 IN1 GND G1 1M VN2222LL 0.1F 9.1V 12V/1A BULB
LTC1255 * F04
NORMALIZED DELAY TIME (1 = RC)
+
470F RSENSE 0.036
Figure 4. Lamp Driver With Delayed Protection
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Selecting RDELAY and CDELAY Figure 5 is a graph of normalized overcurrent shutdown time versus normalized MOSFET current. This graph is used to select the two delay components, RDELAY and CDELAY, which make up a simple RC delay between the drain sense input and the drain sense resistor. The Y axis of the graph is normalized to one RC time constant. The X axis is normalized to the set current. (The set current is defined as the current required to develop 100mV across the drain sense resistor.) Note that the shutdown time is shorter for increasing levels of MOSFET current. This ensures that the total energy dissipated by the MOSFET is always within the bounds established by the manufacturer for safe operation. (See MOSFET data sheet for further S.O.A. information.)
10 1 0.1 0.01 0.1 1 10 100 NORMALIZED MOSFET CURRENT (1 = SET CURRENT)
LTC1255 * F05
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Figure 5. Normalized Delay Time vs MOSFET Current
Using a Speed-Up Diode
MTP3055EL
Another way to reduce the amount of time that the power MOSFET is in a short-circuit condition is to "bypass" the delay resistor with a small signal diode as shown in Figure 6. The diode will engage when the drop across the drain sense resistor exceeds about 0.7V, providing a direct path to the sense pin and dramatically reducing the amount of time the MOSFET is in an overload condition. The drain sense resistor value is selected to limit the maximum DC current to 4A.
LTC1255
APPLICATIO S I FOR ATIO
18V CDELAY 0.01F RDELAY 100k DS1 1/2 LTC1255 IN1 GND G1 12V 1N4148
+
100F
VS
LOAD
LTC1255 * F06
Figure 6. Using a Speed-Up Diode
Current Limited Power Supplies The LTC1255 requires at least 3.5V at the supply pin to ensure proper operation. It is therefore necessary that the supply to the LTC1255 be held higher than 3.5V at all times, even when the output of the switch is short circuited to ground. The output voltage of a current limited regulator may drop very quickly during short circuit and pull the supply pin of the LTC1255 below 3.5V before the shutdown circuitry has had time to respond and remove drive from the gate of the power MOSFET. A supply filter should be added as shown in Figure 7 which holds the supply pin of the LTC1255 high long enough for the overcurrent shutdown circuitry to respond and fully discharge the gate. Linear regulators with small output capacitors are the most difficult to protect as they can "switch" from a voltage mode to a current limited mode very quickly.
15V 12V/2A REGULATOR 10F
+ +
10* 0.01F 47F* VS DS1 1/2 LTC1255
+
10F 100k RSENSE 0.1
1N4148 IN1 GND G1 12V SHORT CIRCUIT
LTC1255 * F07
*SUPPLY FILTER COMPONENT
Figure 7. Supply Filter for Current Limited Supplies
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RSENSE 0.036
W
UU
The large output capacitors on many switching regulators, on the other hand, may be able to hold the supply pin of the LTC1255 above 3.5V sufficiently long that this extra filtering is not required. Because the LTC1255 is micropower in both the standby and ON state, the voltage drop across the supply filter is very small (typically < 6mV) and does not significantly alter the accuracy of the drain sense threshold voltage which is typically 100mV. AUTOMOTIVE APPLICATIONS Reverse Battery Protection The LTC1255 can be protected against reverse battery conditions by connecting a resistor in series with the ground lead as shown in Figure 8. The resistor limits the supply current to less than 120mA with - 12V applied. Since the LTC1255 draws very little current while in normal operation, the drop across the ground resistor is minimal. The 5V P (or controlling logic) is protected by the 10k resistors in series with the input.
14V 5V 28V VS p OR CONTROL LOGIC DS1 1/2 LTC1255 10k IN1 GND G1 12V MTP12N06E
IRF530
+
10F RSENSE 0.036
100
LTC1255 * F08
LOAD
Figure 8. Reverse Battery Protection
Transient Overvoltage Protection
MTP12N06E
A common scheme used to limit overvoltage transients on a 14V nominal automotive power bus is to clamp the supply to the module containing the high-side MOSFET switches with a large transient suppressor diode, D1 in Figure 9. This diode limits the supply voltage to 40V under worse case conditions. The LTC1255 is designed to survive short (10ms) 40V transients and return to normal operation after the transient has passed.
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LTC1255
APPLICATIO S I FOR ATIO
The switches can either be turned OFF by the controlling logic during these transients or latched OFF above 30V by holding the drain sense pin low as shown in Figure 9. Switch status can be ascertained by means of an XNOR gate connected to the input and switch output through 100k current limiting resistors (see Typical Applications section for more detail on this scheme). The switch is reset after the overvoltage event by cycling the input low and then high again. The power MOSFET switch should be selected to have a breakdown voltage sufficiently higher than the 40V supply clamp voltage to ensure that no current is conducted to the load during the transient.
TYPICAL APPLICATIO S
Dual Automotive High-Side Switch with Overvoltage Protection, XNOR Status and 12A Standby Current
14V 0.036
10k 10k** MTD3055E 12V MMBZ5242B 100k G1 LTC1255 G2
14V/1A SOLENOID
1N5400 1/4 74C266 FAULT FROM TO P P, ETC. 100 FROM FAULT P, ETC. TO P 1/4 74C266
TRUTH TABLE IN OUT CONDITION 0 0 SWITCH OFF 1 0 OVERCURRENT 0 1 OPEN LOAD** 1 1 SWITCH ON
FAULT 1 0 0 1
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14V
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+
1F 50V VS DS1 1/2 LTC1255
D1 MR2535L 1k*
RSENSE 0.036
FROM P, ETC.
10k IN1 GND G1 IRF530 12V 1N5242B
100
30V* 1N5256B
LTC1255 * F09
LOAD
*OPTIONAL OVERVOLTAGE (30V) LATCH-OFF COMPONENTS
Figure 9. Overvoltage Transient Protection
+
1F 50V VS DS1 DS2
MR2535L*
0.036
10k 100k IN1 GND 1N5400 IN2 12V MMBZ5242B MTD3055E 10k**
14V/1A SOLENOID
LTC1255 * TA03
* LIMITS VS TRANSIENTS TO <40V. SEE MANUFACTURER DATA SHEET FOR FURTHER DETAIL. ** OPTIONAL OPEN LOAD DETECTION REQUIRES 10k PULL-UP RESISTORS. (ULTRA LOW STANDBY QUIESCENT CURRENT IS SACRIFICED) POWER FROM 5V LOGIC SUPPLY.
LTC1255
TYPICAL APPLICATIO S
10 to 12 Cell Battery Switch and 5V Ramped Load Switch with 12A Standby Current and Optional 3A Overcurrent Shutdown
18V TO 30V FROM BATTERY CHARGER 10 TO 12 CELL BATTERY PACK
1N5400 9.1V MMBZ5239BL
10k 2N2222 10k VS VLOGIC
P OR CONTROL LOGIC
100k IN1 IN2
14V MR2535L
+
10F 50V
5V DIRECTION MOTOR SPEED AND DIRECTION CONTROL LOGIC OR P DIRECTION PWM 1 PWM 2 LTC1255 IN1 IN2 GND
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0.033*
IRFR024
IRFR024 VIN
SWITCHED BATTERY VOUT 5V/1A
0.22F*
100k* 12V MMBZ5242BL
+
100F
HIGH EFFICIENCY SWITCHING REGULATOR
+
DS1 G1 100F
LTC1255 DS2 GND G2
1N4148 100k 1k MTD3055EL 0.1F
LTC1255 * TA04
*OPTIONAL 3A OVERCURRENT SHUTDOWN SEE LTC1149 DATA SHEET FOR CIRCUIT DETAILS
5V/1A (SWITCHED)
Automotive Motor Direction and Speed Control with Stall-Current Shutdown
0.1F VS DS1 G1 DS2 G2
0.1F 100k 30k
0.02
MTD3055E 12V MMBZ5242B 30k MTD3055E 12V MMBZ5242B 14V DC MOTOR
100 MTD3055EL
MTD3055EL
LTC1255 * TA05
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LTC1255
TYPICAL APPLICATIO S
Low Frequency (fO = 100Hz) PWM Motor Speed Control with Current Limit and 22V Overvoltage Shutdown
14V OFF 1N4148 60k 9.1k 30k MR2535L
SLOW
MED
+
1F 84 6 2 5
FAST
15k
1k 1N4148
0.1F
Dual Automotive Lamp Dimmer with Controlled Rise and Fall Times and Short-Circuit Protection
14V MR2535L
+
10F 50V
PULSE WIDTH ADJUST
1N4148
+
10F 84 6 2 5 LMC555 3
100k
1N4148 1k 0.1F 0.01F 1
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+
10F 50V
0.1F 50V VS DS1 G1
0.47F 10k 10k 22V MMBZ5251BL DS2 GND G2 100k
0.01
5.6V IN1 IN2 LMC555 3
LTC1255
IRFR024 22V MMBZ5251BL
100 0.01F 1 MR750 14V MOTOR
LTC1255 * TA06
9.1k
0.1F
0.1F
0.1F
0.05 100k
0.05
5.6V
VS
DS1 G1
30k MTD3055E 100k 12V MMBZ5242B MTD3055E 12V MMBZ5242B #53 14V BULBS
LTC1255 * TA06
LTC1255 IN1 IN2 GND DS2 G2 30k
100
LTC1255
TYPICAL APPLICATIO S
18V to 32V Operation with Overcurrent Shutdown and Optional Overvoltage Shutdown
18V TO 32V 1k 1k RSEN 0.10 1W (IMAX = VBE/RSEN)
24V 1N5252B
FROM P, ETC.
Bootstrapped Gate Driver (100Hz < fO < 10kHz)
9V TO 24V
+
10F 1N4148 0.036 VS
DS1
1/2 LTC1255 G1 FROM P, ETC. IN1 GND 12V 1N5242B 2N2222 *
*VGS = VS - 0.6V (CLAMPED AT 12V) RISE AND FALL TIMES ARE BETA TIMES FASTER
2N3906
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+
1F 50V VS DS1 2N3904 1/2 LTC1255
10k
2N3906 36V* 1N5258B
10k G1 12V 1N5242B IRF530
IN1
GND
*OPTIONAL 36V OVERVOLTAGE SHUTDOWN
18V TO 32V LOAD
LTC1255 * TA08
High-Side Switch with Thermal Shutdown (PTC Thermistor)
9V TO 24V
+
10F PTC* THERMISTOR (100C)
VS
DS1 100k
0.1F
1/2 LTC1255 G1
IRFZ44
IRF530 12V 1N5242B
FROM P, ETC.
IN1
GND
*KEYSTONE RL2006-100-100-30-PT
LOAD
LTC1255 * TA10
LTC1255 * TA09
LOAD
13
LTC1255
TYPICAL APPLICATIO S
H-Bridge DC Motor Driver (Direction and ON/OFF Control)
9V TO 24V
+
5V LTC1255 IN1 1/4 74C02 1/4 74C02 IN2 GND
1/4 74C02 100k MTD3055EL 1N4148
LTC1255 * TA11
DIRECTION
DISABLE
High-Side DC Motor Driver With Electronic Braking and Stalled Motor Shutdown
18V
+
100F 0.47F VS 100k DS1 G1 IN1 LTC1255 DS2 12V 1N5242B G2 30k IRFZ34 1N5400 1* 18V DC MOTOR 30k IRFZ34 0.02
5V 1/4 74C02 1/4 74C02 RUN/COAST
BRAKE
*SIZE RESISTOR TO DISSIPATE ENERGY REGENERATED BY MOTOR DURING BRAKING.
14
U
10F 50V VS DS1 G1 1N4148 DS2 G2 1N4148 100k 100k
0.33F 100k
0.036
MTD3055E 12V MMBZ5242B 12V MMBZ5242B DC MOTOR
MTD3055E
100k MTD3055EL 1N4148
IN2
GND
12V 1N5242B
LTC1255 * TA12
LTC1255
TYPICAL APPLICATIO S
Stepper Motor Driver with Overcurrent Protection
12V 0.01F VS A 100k DS1 G1 IN1 LTC1255 DS2 STEPPER MOTOR CONTROL LOGIC B IN2 GND G2 IRFR024 12V MMBZ5242BL 1N4001 B IRFR024 12V MMBZ5242BL 0.036
5V
C
D
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
+
100F 0.036 100k DS1 IRFR024 STEPPER MOTOR WINDINGS A C 12V MMBZ5242BL DS2 IRFR024 1N4001 D 12V MMBZ5242BL G2 GND IN2 G1 LTC1255 IN1 0.01F VS
1N4001
1N4001
LTC1255 * TA13
15
LTC1255
PACKAGE DESCRIPTIO U
Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead Plastic DIP
0.400 (10.160) MAX 8 7 6 5
0.250 0.010 (6.350 0.254)
1
2
3
4
0.300 - 0.320 (7.620 - 8.128)
0.045 - 0.065 (1.143 - 1.651)
0.130 0.005 (3.302 0.127)
0.009 - 0.015 (0.229 - 0.381)
0.065 (1.651) TYP 0.125 (3.175) MIN 0.020 (0.508) MIN
(
+0.025 0.325 -0.015 8.255 +0.635 -0.381
)
0.045 0.015 (1.143 0.381) 0.100 0.010 (2.540 0.254)
0.018 0.003 (0.457 0.076)
N8 0393
S8 Package 8-Lead SOIC
0.189 - 0.197 (4.801 - 5.004) 8 7 6 5
0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157 (3.810 - 3.988)
1 0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0.016 - 0.050 0.406 - 1.270 0- 8 TYP
2
3
4
0.053 - 0.069 (1.346 - 1.752) 0.004 - 0.010 (0.101 - 0.254)
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) BSC
SO8 0393
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977
LT/GP 0493 10K REV 0
(c) LINEAR TECHNOLOGY CORPORATION 1993

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